From 50e457b38cd88cce8ce42b87cd2f903dd0f58bf7 Mon Sep 17 00:00:00 2001 From: Jason Date: Wed, 15 Jan 2020 16:36:11 -0500 Subject: [PATCH] just d_init set to 0, should be the solution so testing again. --- drivers/ddr/fsl/ctrl_regs.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 1955ba7..33a5db1 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -775,7 +775,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, unsigned int hse; /* Global half strength override */ unsigned int acc_ecc_en = 0; /* Accumulated ECC enable */ unsigned int mem_halt = 0; /* memory controller halt */ - unsigned int bi = 1;//0; /* Bypass initialization */ + unsigned int bi = 0; /* Bypass initialization */ mem_en = 1; sren = popts->self_refresh_in_sleep; @@ -818,8 +818,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, hse = popts->half_strength_driver_enable; /* set when ddr bus width < 64 */ - acc_ecc_en = 0;//(dbw != 0 && ecc_en == 1) ? 1 : 0; - ecc_en = 0; + acc_ecc_en = (dbw != 0 && ecc_en == 1) ? 1 : 0; ddr->ddr_sdram_cfg = (0 | ((mem_en & 0x1) << 31)