Programming Assignment 4: Pipelined RISC-V Simulator With Scoreboard Algorithm
A pipelined CPU simulator for the RISC-V riscv-uconn instruction set architecture implementing a scoreboard algorithm. The simulator translates machine code created by the riscv-uconn assembler, and issues one instruction at a time.
Build Instructions
$ make
Usage
$ ./simulator assembled_program_file.out
where assembled_program_file.out may be any assembled program file generated by the riscy-uconn
assembler.
Unit Tests
Several unit tests are provided in the unittests directory. These unit tests must be assembled before use with the simulator. Ensure that the assembler is compiled. The unit tests can all be assembled by executing the following command in the pa2 directory:
$ ../assembler/assembler unittests/unit_test_file.asm <path>/unit_test_file.out
where unit_test_file is any of the unit test files (written in riscv-uconn assembly) in the
unittests directory. You may also use the provided `assemble_all.sh' script:
$ bash assemble_all.sh