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<?xml version="1.0" encoding="UTF-8"?> | ||
<classpath> | ||
<classpathentry kind="con" path="org.eclipse.jdt.launching.JRE_CONTAINER"/> | ||
<classpathentry kind="src" path="src"/> | ||
<classpathentry kind="output" path="bin"/> | ||
</classpath> |
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<?xml version="1.0" encoding="UTF-8"?> | ||
<projectDescription> | ||
<name>mips_sim_java_template</name> | ||
<comment></comment> | ||
<projects> | ||
</projects> | ||
<buildSpec> | ||
<buildCommand> | ||
<name>org.eclipse.jdt.core.javabuilder</name> | ||
<arguments> | ||
</arguments> | ||
</buildCommand> | ||
</buildSpec> | ||
<natures> | ||
<nature>org.eclipse.jdt.core.javanature</nature> | ||
</natures> | ||
</projectDescription> |
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# mips_sim_template_java | ||
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public final class CombModule { | ||
public static int[] ALU_32(int n1, int n2, int alu_control) | ||
{ | ||
int result = 0; | ||
int zero; | ||
if (alu_control == 0) // and | ||
result = (n1 & n2); | ||
else if (alu_control == 1) // or | ||
result = (n1 | n2); | ||
else if (alu_control == 2) // add | ||
result = n1 + n2; | ||
else if (alu_control == 6) // sub | ||
result = n1 - n2; | ||
else if (alu_control == 7) // slt | ||
{ | ||
if (n1 < n2) | ||
result = 1; | ||
else | ||
result = 0; | ||
} | ||
// result &= 0xFFFFFFFF; // no need for Java | ||
if (result == 0) | ||
zero = 1; | ||
else | ||
zero = 0; | ||
return new int[] {result, zero}; | ||
} | ||
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public static int MUX_2_1(int d0, int d1, int sel) | ||
{ | ||
return ((sel == 0) ? d0 : d1); | ||
} | ||
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public static int AND_2(int d0, int d1) | ||
{ | ||
return (d0 & d1); | ||
} | ||
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} |
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public class Core_SC { | ||
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private static final int OPCODE_R = 0; | ||
private static final int OPCODE_J = 2; | ||
private static final int OPCODE_BEQ = 4; | ||
private static final int OPCODE_SW = 0x2B; | ||
private static final int OPCODE_LW = 0x23; | ||
private static final int OPCODE_ADDI = 8; | ||
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public Memory I_Mem; | ||
public Memory D_Mem; | ||
public RegisterFile RF; | ||
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private Register RegPC; | ||
private Signals signals; | ||
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private int cycle_num; | ||
private int mode; | ||
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// Functions | ||
public Core_SC() | ||
{ | ||
RF = new RegisterFile(); | ||
RegPC = new Register(); | ||
I_Mem = new Memory(); | ||
D_Mem = new Memory(); | ||
signals = new Signals(); | ||
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cycle_num = 0; | ||
} | ||
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public void set_PC(int pc) | ||
{ | ||
RegPC.set_data(pc); | ||
RegPC.set_write(1); | ||
} | ||
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public void set_mode(int m) | ||
{ | ||
mode = m; | ||
} | ||
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// Your Code | ||
public int run(int n_cycles) | ||
{ | ||
int i_cycles = 0; | ||
int ending_PC; | ||
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I_Mem.set_memread(1); | ||
I_Mem.set_memwrite(0); | ||
ending_PC = I_Mem.get_ending_address(); | ||
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while (n_cycles == 0 || i_cycles < n_cycles) | ||
{ | ||
if ((mode & 2) == 0) Utilities.print_new_cycle(cycle_num); | ||
i_cycles ++; | ||
cycle_num ++; | ||
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// clock changes | ||
RegPC.clock(); | ||
RF.clock(); | ||
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// read PC | ||
signals.PC = RegPC.read(); | ||
signals.PC_4 = signals.PC_new = signals.PC + 4; // PC + 4 | ||
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if ((mode & 2) == 0) Utilities.println_int("PC", signals.PC); | ||
if (signals.PC > ending_PC) { | ||
if ((mode & 2) == 0) System.out.println("No More Instructions"); | ||
i_cycles --; | ||
break; | ||
} | ||
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I_Mem.set_address(signals.PC); | ||
I_Mem.run(); | ||
signals.instruction = I_Mem.get_data(); | ||
if ((mode & 2) == 0) Utilities.println_int("instruction", signals.instruction); | ||
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// Now you have PC and the instruction | ||
// Some signals' value can be extracted from instruction directly | ||
signals_from_instruction(signals.instruction, signals); | ||
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// call main_control | ||
main_control(signals.opcode, signals); | ||
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// call sign_extend | ||
signals.Sign_extended_immediate = sign_extend(signals.immediate); | ||
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// Write_register. Also an example of using MUX | ||
signals.Write_register = CombModule.MUX_2_1(signals.rt, signals.rd, signals.RegDst); | ||
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// ALU control | ||
signals.ALU_operation = ALU_control(signals.ALUOp, signals.funct); | ||
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// Calculate branch address | ||
signals.Branch_address = calculate_branch_address(signals.PC_4, signals.Sign_extended_immediate); | ||
signals.Jump_address = calculate_jump_address(signals.PC_4, signals.instruction); | ||
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// Print out signals generated in Phase 1. | ||
if ((mode & 4) == 0) Utilities.print_signals_1(signals); | ||
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if ((mode & 1) != 0) { | ||
RegPC.set_data(signals.PC_4); | ||
RegPC.set_write(1); | ||
continue; | ||
} | ||
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// You will continue to complete the core in phase 2 | ||
// Use RF, ALU, D_Mem | ||
// Preapre RF write | ||
// Compute PC_new | ||
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RegPC.set_data(signals.PC_new); | ||
RegPC.set_write(1); | ||
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// Print out signals generated in Phase 2. | ||
if ((mode & 8) == 0) Utilities.print_signals_2(signals); | ||
} | ||
return i_cycles; | ||
} | ||
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// Generate signals that can be extracted from instruction | ||
private void signals_from_instruction (int instruction, Signals sig) | ||
{ | ||
/* Extract the following signals from instruction. | ||
opcode, rs, rt, rd, funct, immediate | ||
*/ | ||
sig.opcode = (instruction >> 26) & 0x3F; | ||
} | ||
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// Main control unit. Generate control signals from opcode. | ||
// The signal values are stored in a Signals object. | ||
private void main_control (int opcode, Signals sig) | ||
{ | ||
// Set all signals to 0 first | ||
sig.RegDst = 0; | ||
sig.Jump = 0; | ||
sig.Branch = 0; | ||
sig.MemRead = 0; | ||
sig.MemtoReg = 0; | ||
sig.ALUOp = 0; | ||
sig.MemWrite = 0; | ||
sig.ALUSrc = 0; | ||
sig.RegWrite = 0; | ||
if (opcode == OPCODE_R) { | ||
sig.RegDst = 1; | ||
sig.ALUOp = 2; | ||
sig.RegWrite = 1; | ||
} | ||
// You can throw an exception on unknown opcode. | ||
// throw new IllegalArgumentException("Error: Invalid opcode " + opcode); | ||
} | ||
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/* Perform sign extension on immd. | ||
Sign extend module. | ||
Convert 16 bits to an int. | ||
Extract the lower 16 bits. | ||
If bit 15 of immd is 1, compute the correct negative value (immd - 0x10000). | ||
*/ | ||
private int sign_extend (int immd) | ||
{ | ||
immd = immd & 0xFFFF; | ||
return immd; | ||
} | ||
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// return 4 bits (as an int) ALU_operation from ALUop and funct code. | ||
private int ALU_control(int alu_op, int funct) | ||
{ | ||
int alu_control_out = 0; | ||
if (alu_op == 0) // lw,sw,addi | ||
alu_control_out = 2; // 0010 add | ||
// else | ||
// throw new IllegalArgumentException("Error: Invalid ALUOp " + alu_op); | ||
return alu_control_out; | ||
} | ||
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private int calculate_branch_address(int pc_4, int extended) | ||
{ | ||
int addr = 0; | ||
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return addr; | ||
} | ||
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private int calculate_jump_address(int pc_4, int instruction) | ||
{ | ||
int addr = 0; | ||
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return addr; | ||
} | ||
} |
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public class MIPS_Sim { | ||
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public static void main(String[] args) { | ||
// TODO Auto-generated method stub | ||
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int verbose = 0; | ||
int cycles = 0; | ||
int mode = 0; | ||
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if (args.length < 1 || args.length > 3) { | ||
System.err.println("Error: Please specify an input file."); | ||
System.exit(1); | ||
} | ||
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for (int i = 1; i < args.length; i ++) { | ||
if (args[i].equals("-v")) { | ||
verbose = 1; | ||
} else if (args[i].equals("-p1")) { | ||
mode = 1; | ||
} else if (args[i].equals("-q")) { | ||
mode = 0xE; | ||
} else { | ||
try { | ||
cycles = Integer.parseInt(args[i]); | ||
} catch (NumberFormatException e) { | ||
System.err.println("Error: " + args[i] + " is not a valid integer."); | ||
System.exit(1); | ||
} | ||
if (cycles < 0) { | ||
System.err.println("Error: Number of cycles must be nonnegative."); | ||
System.exit(1); | ||
} | ||
} | ||
} | ||
/* | ||
{ | ||
String cwd = System.getProperty("user.dir"); | ||
System.out.println("Current working directory in Java : " + cwd); | ||
System.out.println("Input file name : " + args[0]); | ||
} | ||
*/ | ||
Core_SC core = new Core_SC(); | ||
Utilities.load_file(core.I_Mem, args[0]); | ||
core.I_Mem.dump(); | ||
core.set_PC(core.I_Mem.get_starting_address()); | ||
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core.I_Mem.set_verbose(verbose); | ||
core.RF.set_verbose(verbose); | ||
core.set_mode(mode); | ||
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int actual_cycles = core.run(cycles); | ||
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core.RF.dump(); | ||
core.D_Mem.dump(); | ||
System.out.println("Number of cycles=" + actual_cycles); | ||
} | ||
} |
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