disasm-i.c

/*
  mipsivm - MIPS Interpreting Virtual Machine

  Copyright(c) 2018-2021, Yaotian "Zero" Tang. All rights reserved.

  This file takes charge of Disassembly Engine (I-Format).

  This program is distributed in the hope that it will be useful, but 
  without any warranty (no matter implied warranty or merchantability
  or fitness for a particular purpose, etc.).

  File Location: /disasm-i.c
*/

#include <midef.h>
#include <mipsdef.h>
#include <vmcb.h>
#include <devkit.h>

// Normal I-Format Instructions...
void mips_disasm_i_beq(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"beq %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],pc+(imm<<2));
}

void mips_disasm_i_bne(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"bne %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],pc+(imm<<2));
}

void mips_disasm_i_blez(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"blez %s,0x%X",mips_gpr_string[instruction.i.rs],pc+(imm<<2));
}

void mips_disasm_i_bgtz(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"bgtz %s,0x%X",mips_gpr_string[instruction.i.rs],pc+(imm<<2));
}

void mips_disasm_i_addi(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"addi %s,%s,%d",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],imm);
}

void mips_disasm_i_addiu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	sim_snprintf(mnemonic,length,"addiu %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],instruction.i.imm);
}

void mips_disasm_i_slti(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"slti %s,%s,%d",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],imm);
}

void mips_disasm_i_sltiu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	sim_snprintf(mnemonic,length,"sltiu %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],instruction.i.imm);
}

void mips_disasm_i_andi(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const u32 imm=(u32)instruction.i.imm;
	sim_snprintf(mnemonic,length,"andi %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],imm);
}

void mips_disasm_i_ori(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const u32 imm=(u32)instruction.i.imm;
	sim_snprintf(mnemonic,length,"ori %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],imm);
}

void mips_disasm_i_xori(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const u32 imm=(u32)instruction.i.imm;
	sim_snprintf(mnemonic,length,"xori %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],imm);
}

void mips_disasm_i_lui(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const u16 imm=(u16)instruction.i.imm;
	sim_snprintf(mnemonic,length,"lui %s,%s,0x%X",mips_gpr_string[instruction.i.rs],mips_gpr_string[instruction.i.rt],imm);
}

void mips_disasm_i_lb(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lb %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_lh(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lh %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_lwl(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lwl %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_lw(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lw %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_lbu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lbu %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_lhu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lhu %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_lwr(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"lwr %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_sb(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"sb %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_sh(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"sh %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_swl(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"swl %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_sw(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"sw %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_swr(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"swr %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_ll(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"ll %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

void mips_disasm_i_sc(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"sc %s,%d(%s)",mips_gpr_string[instruction.i.rt],imm,mips_gpr_string[instruction.i.rs]);
}

// RegImm I-Format Instructions...
void mips_disasm_i_bltz(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"bltz %s,0x%X",mips_gpr_string[instruction.i.rs],pc+(imm<<2));
}

void mips_disasm_i_bgez(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"bgez %s,0x%X",mips_gpr_string[instruction.i.rs],pc+(imm<<2));
}

void mips_disasm_i_tgei(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"tgei %s,%d",mips_gpr_string[instruction.i.rs],imm);
}

void mips_disasm_i_tgeiu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"tgeiu %s,%d",mips_gpr_string[instruction.i.rs],imm);
}

void mips_disasm_i_tlti(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"tlti %s,%d",mips_gpr_string[instruction.i.rs],imm);
}

void mips_disasm_i_tltiu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"tltiu %s,%d",mips_gpr_string[instruction.i.rs],imm);
}

void mips_disasm_i_teqi(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"teqi %s,%d",mips_gpr_string[instruction.i.rs],imm);
}

void mips_disasm_i_tnei(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"tnei %s,%d",mips_gpr_string[instruction.i.rs],imm);
}

void mips_disasm_i_bltzal(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"bltzal %s,0x%X",mips_gpr_string[instruction.i.rs],pc+(imm<<2));
}

void mips_disasm_i_bgezal(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	const i32 imm=(i32)((i16)instruction.i.imm);
	sim_snprintf(mnemonic,length,"bgezal %s,0x%X",mips_gpr_string[instruction.i.rs],pc+(imm<<2));
}