disasm.c

/*
  mipsivm - MIPS Interpreting Virtual Machine

  Copyright(c) 2018-2021, Yaotian "Zero" Tang. All rights reserved.

  This file takes charge of Disassembly Engine.

  This program is distributed in the hope that it will be useful, but 
  without any warranty (no matter implied warranty or merchantability
  or fitness for a particular purpose, etc.).

  File Location: /disasm.c
*/

#include <midef.h>
#include <mipsdef.h>
#include <vmcb.h>
#include <devkit.h>
#include <disasm.h>

void mips_disasm_j_jal(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	u32 addr=pc&0xF0000000;
	addr|=instruction.j.addr<<2;
	sim_snprintf(mnemonic,length,"jal 0x%X",addr);
}

void mips_disasm_j_j(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	u32 addr=pc&0xF0000000;
	addr|=instruction.j.addr<<2;
	sim_snprintf(mnemonic,length,"j 0x%X",addr);
}

void mips_disasm_r_format(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	mips_disasm_r_funct[instruction.r.funct](mnemonic,length,pc,instruction);
}

void mips_disasm_r2_format(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	mips_disasm_r2_funct[instruction.r.funct](mnemonic,length,pc,instruction);
}

void mips_disasm_regimm_i_format(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	mips_disasm_regimm_i_funct[instruction.i.rt](mnemonic,length,pc,instruction);
}

void mips_disasm_fpu(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	sim_snprintf(mnemonic,length,"FPU instruction disasm is not implemented!");
}

void mips_disasm_unknown_instruction(char* mnemonic,u32 length,u32 pc,mips_instruction instruction)
{
	sim_snprintf(mnemonic,length,"Unknown Instruction!");
}

bool mips_disasm(char* mnemonic,u32 length,vmcb_p vcpu,u32 pc)
{
	// Disassembly requires read-permission only.
	void* ip=mips_ref_hmem(vcpu,pc,true,false,false,false);
	if(ip)
	{
		mips_instruction mi;
		mi.value=*(u32*)ip;
		mips_disasm_by_opcode[mi.r.op](mnemonic,length,pc,mi);
		return true;
	}
	return false;
}