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cag-uconn
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SRCS = $(wildcard src/*.c) | ||
HEADERS = $(wildcard src/*.h) | ||
CC = gcc | ||
CFLAGS = -g -std=c99 | ||
LDFLAGS = -lm | ||
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default: simulator | ||
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simulator: $(SRCS) $(HEADERS) | ||
@echo "Building $@..." | ||
@echo "Sources: $(SRCS)" | ||
@echo "Headers: $(HEADERS)" | ||
$(CC) $(CFLAGS) -o $@ $(SRCS) $(LDFLAGS) | ||
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clean: | ||
-rm -f simulator | ||
-rm -f *.txt | ||
-rm -fr assembled_tests |
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# Programming Assignment 4: Pipelined RISC-V Simulator With Scoreboard Algorithm | ||
A pipelined CPU simulator for the RISC-V riscv-uconn instruction set architecture implementing a scoreboard algorithm. The simulator translates machine code created by the riscv-uconn assembler, and issues one instruction at a time. | ||
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## Build Instructions | ||
$ make | ||
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## Usage | ||
$ ./simulator assembled_program_file.out | ||
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where `assembled_program_file.out` may be any assembled program file generated by the riscy-uconn | ||
assembler. | ||
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## Unit Tests | ||
Several unit tests are provided in the `unittests` directory. These unit tests must be assembled before use with the simulator. Ensure that the assembler is compiled. The unit tests can all be assembled by executing the following command in the `pa2` directory: | ||
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$ ../assembler/assembler unittests/unit_test_file.asm <path>/unit_test_file.out | ||
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where `unit_test_file` is any of the unit test files (written in riscv-uconn assembly) in the | ||
`unittests` directory. You may also use the provided `assemble_all.sh' script: | ||
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$ bash assemble_all.sh |
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#!/bin/bash | ||
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# This script is privided to you to assemble all unit tests for you. | ||
# 1) First ensure that that your assembler is compiled | ||
# 2) Then, run "$ bash assemble_all.sh". | ||
# A new directory "assembled tests will be generated, populated with all the binary tests. | ||
# Note: "$ make clean" will remove these tests | ||
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if [ ! -d assembled_tests ]; then | ||
echo "Creating \"assembled_tests\" directory..." | ||
mkdir assembled_tests | ||
fi | ||
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if [ ! -f ../assembler/assembler ]; then | ||
echo "Error: Assembler is not compiled." | ||
exit | ||
fi | ||
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for test in unittests/*.asm; do | ||
echo "Assembling test \"$test\"..." | ||
testname=$(basename $test .asm) | ||
../assembler/assembler $test assembled_tests/$testname.out > /dev/null 2>&1 | ||
done | ||
echo "Done!" |
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/** | ||
* University of Connecticut | ||
* CSE 5302 / ECE 5402: Computer Architecture | ||
* Fall 2023 | ||
* | ||
* Programming Assignment 4: Pipelined RISC-V Simulator With Scoreboard | ||
* | ||
* riscy-uconn: instruction_map.h | ||
* | ||
* DO NOT MODIFY THIS FILE | ||
* | ||
*/ | ||
#pragma once | ||
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/* Some helpful defines for decoding instructions */ | ||
#define bit_7 0x00000080 | ||
#define bit_20 0x00100000 | ||
#define bit_31 0x80000000 | ||
#define bit_2_downto_0 0x00000007 | ||
#define bit_4_downto_0 0x0000001F | ||
#define bit_6_downto_0 0x0000007F | ||
#define bit_10_downto_7 0x00000780 | ||
#define bit_11_downto_7 0x00000F80 | ||
#define bit_11_downto_8 0x00000F00 | ||
#define bit_19_downto_12 0x000FF000 | ||
#define bit_30_downto_21 0x7FE00000 | ||
#define bit_30_downto_25 0x7E000000 | ||
#define bit_31_downto_12 0xFFFFF000 | ||
#define bit_31_downto_20 0xFFF00000 | ||
#define bit_31_downto_25 0xFE000000 | ||
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/* Opcode Bits */ | ||
#define RTYPE 0x33 | ||
#define ITYPE_ARITH 0x13 | ||
#define ITYPE_LOAD 0x3 | ||
#define STYPE 0x23 | ||
#define BTYPE 0x63 | ||
#define LUI 0x37 | ||
#define JAL 0x6F | ||
#define JALR 0x67 | ||
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/* Funct3 Bits */ | ||
/* R and I-Type Arithmetic */ | ||
#define ADD_SUB 0b000 | ||
#define SUB 0b000 | ||
#define SLT 0b010 | ||
#define SLL 0b001 | ||
#define SRL 0b101 | ||
#define AND 0b111 | ||
#define OR 0b110 | ||
#define XOR 0b100 | ||
/* I-type JALR and Load, S-type, and B-type */ | ||
#define LW_SW 0b010 | ||
#define BEQ 0b000 | ||
#define BNE 0b001 | ||
#define BLT 0b100 | ||
#define BGE 0b101 | ||
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/* R-type Funct7s */ | ||
#define ADD_F7 0x0 | ||
#define SUB_F7 0x20 |
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/** | ||
* University of Connecticut | ||
* CSE 5302 / ECE 5402: Computer Architecture | ||
* Fall 2023 | ||
* | ||
* Programming Assignment 4: Pipelined RISC-V Simulator With Scoreboard | ||
* | ||
* riscy-uconn: register_map.c | ||
* | ||
* DO NOT MODIFY THIS FILE | ||
* | ||
*/ | ||
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#include "register_map.h" | ||
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const char* register_map[] = { | ||
[0] = "zero", | ||
[1] = "ra", | ||
[2] = "sp", | ||
[3] = "gp", | ||
[4] = "tp", | ||
[5] = "t0", | ||
[6] = "t1", | ||
[7] = "t2", | ||
[8] = "s0", | ||
[9] = "s1", | ||
[10] = "a0", | ||
[11] = "a1", | ||
[12] = "a2", | ||
[13] = "a3", | ||
[14] = "a4", | ||
[15] = "a5", | ||
[16] = "a6", | ||
[17] = "a7", | ||
[18] = "s2", | ||
[19] = "s3", | ||
[20] = "s4", | ||
[21] = "s5", | ||
[22] = "s6", | ||
[23] = "s7", | ||
[24] = "s8", | ||
[25] = "s9", | ||
[26] = "s10", | ||
[27] = "s11", | ||
[28] = "t3", | ||
[29] = "t4", | ||
[30] = "t5", | ||
[31] = "t6", | ||
}; |
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/** | ||
* University of Connecticut | ||
* CSE 5302 / ECE 5402: Computer Architecture | ||
* Fall 2023 | ||
* | ||
* Programming Assignment 4: Pipelined RISC-V Simulator With Scoreboard | ||
* | ||
* riscy-uconn: register_map.h | ||
* | ||
* DO NOT MODIFY THIS FILE | ||
* | ||
*/ | ||
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#pragma once | ||
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extern const char* register_map[]; |
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